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| www..com STL30NF3LL N-CHANNEL 30V - 0.008 - 30A PowerFLATTM LOW GATE CHARGE STripFETTM MOSFET PRELIMINARY DATA TYPE STL30NF3LL s s s VDSS 30 V RDS(on) < 0.010 ID 30 A TYPICAL RDS(on) = 0.008 IMPROVED DIE-TO-FOOTPRINT RATIO VERY LOW PROFILE PACKAGE DESCRIPTION This Power MOSFET is the second generation of STMicroelectronics unique "STripFETTM" technology. The resulting transistor shows extremely low onresistance and minimal gate charge. The new PowerFLATTM package allows a significant reduction in board space without compromising performance. PowerFLATTM(6x5) (Chip Scale Package) INTERNAL SCHEMATIC DIAGRAM APPLICATIONS s DC-DC CONVERTERS s BATTERY MANAGEMENT IN NOMADIC EQUIPMENT ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID(#) IDM (l) PTOT Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Storage Temperature Max. Operating Junction Temperature Value 30 30 16 30 19 120 80 0.64 - 55 to 150 Unit V V V A A A W W/C C (q) Pulse width limited by safe operating area (#) Limited by Wire Bonding November 2001 1/6 www..com STL30NF3LL THERMAL DATA Rthj-case Rthj-amb Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max 1.56 50 C/W C/W ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 16V Min. 30 1 10 100 Typ. Max. Unit V A A nA ON (1) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250A VGS = 10 V, ID = 15 A VGS = 4.5 V, ID = 15A Min. 1 0.008 0.0095 0.010 0.013 Typ. Max. Unit V DYNAMIC Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 15V, ID = 15 A VDS = 25 V, f = 1 MHz, VGS = 0 Min. Typ. 30 2210 635 138 Max. Unit S pF pF pF 2/6 www..com STL30NF3LL ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 15 V, ID = 30 A RG = 4.7 VGS = 4.5V (see test circuit, Figure 1) VDD = 24 V, ID = 30 A, VGS = 5 V (see test circuit, Figure 1) Min. Typ. 22 130 30 9 12.5 40 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol td(off) tf Parameter Turn-off-Delay Time Fall Time Test Conditions VDD = 15 V, ID = 30 A, RG = 4.7, VGS = 4.5 V (see test circuit, Figure 1) Min. Typ. 36.5 36.5 Max. Unit ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery ChargeReverse Recovery Current ISD = 15 A, VGS = 0 ISD = 30 A, di/dt = 100A/s, VDD = 15 V, Tj = 150C (see test circuit, Figure 3) 65 105 3.4 Test Conditions Min. Typ. Max. 30 120 1.2 Unit A A V ns nC A Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3/6 www..com STL30NF3LL Fig. 1: Switching Times Test Circuit For Resistive Load Fig. 2: Gate Charge test Circuit Fig. 3: Test Circuit For Diode Recovery Behaviour 4/6 www..com STL30NF3LL PowerFLATTM(6x5) MECHANICAL DATA mm. DIM. MIN. A A1 b C D D2 E E2 e F G H I L 0.70 3.55 1.27 1.99 2.20 0.40 0.219 0.90 0.028 4.15 6.00 3.65 0.140 0.049 0.078 0.086 0.015 0.0086 0.035 0.35 1.61 5.00 4.25 0.163 0.236 0.144 0.80 0.02 0.47 0.014 0.063 0.197 0.167 TYP MAX. 1.00 MIN. 0.031 0.001 0.018 TYP. MAX. 0.039 inch 5/6 www..com STL30NF3LL Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 6/6 |
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